dual - channel ccd signal processor with precision timing core data sheet ADDI7013 rev. sp0 document feedback information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no licen se is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.3 29.4700 ? 2013 analog devices, inc. all rights reserved. technical support www.analog.com features differential analog inputs cds or sha (cds bypass) with 7 gain settings 0 db to 36 db, 10 - bit variable gain amplifier (vga) 1 6 - bit, 7 5 msps analog - to - digital converter (adc) precision timing core with 210 ps resolution at 75 mhz 8 independent h - clock phases with programmable drive strength (3.6 v maximum swing) 4 general - purpose outputs (gpo) on - c hip s ync generator with external sync input reduced range lvds outputs with singl e clock lane 6 mm 6 mm csp_bga package with 0.5 mm pitch applications industrial cameras surveillance cameras medical imaging professional photography general description the ADDI7013 is a highly integrated, dual - channel , ccd signal processor for high speed digital imaging applications. each channel is specified at pixel rates of up to 7 5 mhz and consists of a complete analog front end (afe) with analog - to - digital conversion. the preci sion timing ? core allows adjustment of the correlated double sampler (cds) and horizontal clocks with 2 1 0 ps resolution at 7 5 mhz operation. there are eight independent horizontal clock outputs with programmable drive strength to support a variety of ccd timing requirements. each analog front en d includes black level clamping; a cds; a vg a; and a 16 - bit, 7 5 m sps analog - to - digital converter (adc). operation is programmed using a 3 - wire serial interface. packaged in a space - savin g, 6 mm 6 mm, csp_bga, the ADDI7013 is specified over an operating temperature range of ? 40 c to +85c. functional block dia gram figure 1 . for more information about the ADDI7013 , contact analog devices, inc., at afe.ccd@analog.com . h1 t o h4 hl1, hl2 rg1, rg2 gpo1 t o gpo4 inp_ a inm_ a cds/ sh a vg a 0db t o 36db 0db t o 18db clam p vref adc inp_b inm_b cds/ sh a vg a 0db t o 36db 0db t o 18db clam p adc reduced range l vds inter f ace vd sync hd sd at a sck cli s l precision t iming core is a tg interna l clocks interna l registers ADDI7013 dout0n_ a dout0p_ a dout0n_b dout0p_b dout1p_ a dout1n_ a dout1p_b dout1n_b tclk p tclkn 8 4 horizon t a l drivers 1 1784-001
ADDI7013 data sheet rev. sp0 | page 2 of 2 notes ? 2013 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d11784f - 0 - 10/13(sp0)
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